Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

AS8SLC128K32 Datasheet(PDF) 5 Page - Austin Semiconductor

Part No. AS8SLC128K32
Description  128K x 32 SRAM SRAM MEMORY ARRAY
Download  10 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AUSTIN [Austin Semiconductor]
Homepage  http://www.austinsemiconductor.com
Logo 

AS8SLC128K32 Datasheet(HTML) 5 Page - Austin Semiconductor

 
Zoom Inzoom in Zoom Outzoom out
 5 / 10 page
background image
SRAM
SRAM
SRAM
SRAM
SRAM
AS8SLC128K32
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
5
AS8SLC128K32
Rev. 0.6 06/05
Austin Semiconductor, Inc.
LOW V
CC DATA RETENTION WAVEFORM
LOW POWER CHARACTERISTICS (L Version Only)
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345
12345
12345
12345
12345
12345
12345
12345
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345678901234567
12345
12345
12345
12345
12345
12345
12345
12345
1234567
1234567
1234567
1234567
1234567
1234567
1234567
1234567
DATA RETENTION MODE
4.5V
4.5V
V
DR > 2V
V
DR
tCDR
tR
V
CC
CS\ 1-4
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
NOTES
VCC for Retention Data
VDR
2V
VCC = 2V
ICCDR
24
mA
VCC = 3V
ICCDR
32
mA
Chip Deselect to Data
Retention Time
tCDR
0ns
4
Operation Recovery Time
tR
20
ms
4, 11
Data Retention Current
All Inputs @ Vcc + 0.2V
or Vss + 0.2V,
CS\ = Vcc + 0.2V
CONDITIONS
t
HZCS, is less than tLZCS, and tHZWE is less than tLZWE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest
oc-
curring chip enable.
11. t
RC= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
13. I
CC is for full 32 bit mode.
NOTES
1. All voltages referenced to V
SS (GND).
2. Worst case address switching.
3. ICC is dependent on output loading and cycle rates.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 & 2 unless otherwise noted.
6. t
HZCS, tHZOE and tHZWE are specified with CL= 5pF as in
Fig.
2. Transition is measured +/- 200 mV typical from steady
state voltage, allowing for actual tester RC time constant.
7. At any given temperature and voltage condition,
RC(MIN)
unloaded, and f=
HZ.
t
1


Html Pages

1  2  3  4  5  6  7  8  9  10 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn