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CS2200CP-CZZR Datasheet(PDF) 9 Page - Cirrus Logic

Part # CS2200CP-CZZR
Description  Fractional-N Frequency Synthesizer
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS2200CP-CZZR Datasheet(HTML) 9 Page - Cirrus Logic

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CS2200-CP
DS759F1
9
CONTROL PORT SWITCHING CHARACTERISTICS - SPI FORMAT
Inputs: Logic 0 = GND; Logic 1 = VD; CL =20pF.
Notes: 9.
tspi is only needed before first falling edge of CS after power is applied. tspi = 0 at all other times.
10. Data must be held for sufficient time to bridge the transition time of CCLK.
11. For fcclk < 1 MHz.
Parameter
Symbol
Min
Max
Unit
CCLK Clock Frequency
fccllk
-6
MHz
CCLK Edge to CS Falling
(Note 9)tspi
500
-
ns
CS High Time Between Transmissions
tcsh
1.0
-
µs
CS Falling to CCLK Edge
tcss
20
-
ns
CCLK Low Time
tscl
66
-
ns
CCLK High Time
tsch
66
-
ns
CDIN to CCLK Rising Setup Time
tdsu
40
-
ns
CCLK Rising to DATA Hold Time
(Note 10)tdh
15
-
ns
Rise Time of CCLK and CDIN
(Note 11)tr2
-
100
ns
Fall Time of CCLK and CDIN
(Note 11)tf2
-
100
ns
Delay from Supply Voltage Stable to Control Port Ready
tdpor
100
-
µs
t
r2
t
f2
t
dsu
t
dh
t
sch
t
scl
CS
CCLK
CDIN
t
css
t
csh
t
spi
tdpor
VD
Figure 3. Control Port Timing - SPI Format (Write Only)


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