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MAX15023ETG+ Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX15023ETG+ Datasheet(HTML) 10 Page - Maxim Integrated Products |
10 / 28 page Wide 4.5V to 28V Input, Dual-Output Synchronous Buck Controller 10 ______________________________________________________________________________________ Pin Description (continued) PIN NAME FUNCTION 13 PGND2 Low-Side Gate-Driver Supply Return (Regulator 2). Connect to the source of the low-side MOSFET of Regulator 2. 14 DL2 Low-Side Gate-Driver Output for Regulator 2. DL2 swings from VCC to PGND2. DL2 is low before VCC reaches the UVLO rising threshold voltage. 15 PGOOD2 Power-Good Output (Open Drain) for Channel 2. To obtain a logic signal, pull up PGOOD2 with an external resistor connected to a positive voltage below 28V. 16 VCC Internal 5.2V Linear Regulator Output and the Device’s Core Supply. When using the internal regulator, bypass VCC to SGND with a 4.7μF minimum low-ESR ceramic capacitor. If VCC is connected to IN for 5V operation, then a 2.2μF ceramic capacitor is adequate for decoupling (see the Typical Application Circuits). 17 FB2 Feedback Input for Regulator 2. Connect FB2 to a resistive divider between output 2 and SGND to adjust the output voltage between 0.6V and (0.85 x input voltage (V)). See the Setting the Output Voltage section. 18 COMP2 Compensation Pin for Regulator 2. See the Compensation section. 19 RT Oscillator-Timing Resistor Input. Connect a resistor from RT to SGND to set the oscillator frequency from 200kHz to 1MHz (see the Setting the Switching Frequency section). 20 SGND Signal Ground. Connect SGND to the SGND plane. SGND also serves as sensing input of the synchronous MOSFET’s VDS drop (source terminals) for both channels. 21 IN Internal VCC Regulator Input. Bypass IN to SGND with a 1μF minimum ceramic capacitor when the internal linear regulator (VCC) is used. When operating in the 5V ±10% range, connect IN to VCC. 22 LIM2 Current-Limit Adjustment for Regulator 2. Connect a resistor (RLIM2) from LIM2 to SGND to adjust the current-limit threshold (VITH2) from 30mV (RLIM2 = 6k Ω) to 300mV (RLIM2 = 60kΩ). See the Setting the Cycle-by-Cycle Low-Side Source Peak Current Limit section. 23 LIM1 Current-Limit Adjustment for Regulator 1. Connect a resistor (RLIM1) from LIM1 to SGND to adjust the current-limit threshold (VITH1) from 30mV (RLIM1 = 6k Ω) to 300mV (RLIM1 = 60kΩ). See the Setting the Cycle-by-Cycle Low-Side Source Peak Current Limit section. 24 COMP1 Compensation Pin for Regulator 1. See the Compensation section. —EP Exposed Paddle. Connect EP to a large copper plane at SGND potential to improve thermal dissipation. Do not use as the main IC’s SGND ground connection. |
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