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DS3502 Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # DS3502
Description  High-Voltage, NV, I2C POT
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3502 Datasheet(HTML) 9 Page - Maxim Integrated Products

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High-Voltage, NV, I2C POT
_______________________________________________________________________________________
9
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition.
See Figure 3 for a read example using the repeated
START condition to specify the starting memory location.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS3502,
decouple both the power-supply pin (VCC) and the
wiper-bias voltage pin (V+) with a 0.01µF or 0.1µF
capacitor. Use a high-quality ceramic surface-mount
capacitor if possible. Surface-mount components mini-
mize lead inductance, which improves performance,
and ceramic capacitors tend to have adequate high-
frequency response for decoupling applications.
SDA and SCL Pullup Resistors
SDA is an I/O with an open-collector output that
requires a pullup resistor to realize high-logic levels. A
master using either an open-collector output with a
pullup resistor or a push-pull output driver must be
used for SCL. Pullup resistor values should be chosen
to ensure that the rise and fall times listed in the
I2C AC
Electrical Characteristics are within specification. A typ-
ical value for the pullup resistors is 4.7k
Ω.
SLAVE
ADDRESS*
START
START
0
1
0
1
0
A1
A0
R/W
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MSB
LSB
MSB
LSB
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
READ/
WRITE
REGISTER ADDRESS
b7
b6
b5
b4
b3
b2
b1
b0
DATA
STOP
SINGLE-BYTE WRITE
REGISTER 00h
SINGLE-BYTE READ
-READ CR REGISTER
START
REPEATED
START
51h
MASTER
NACK
STOP
0 1010000
00000 010
02h
01010 001
0 1010000
00000 000
50h
00h
STOP
DATA
EXAMPLE I2C TRANSACTIONS (WHEN A0 AND A1 ARE CONNECTED TO GND).
TYPICAL I2C WRITE TRANSACTION
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PINS A0 AND A1.
DATA
50h
A)
B)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
Figure 3. I2C Communication Examples


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