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V•I Chip Bus Converter Module

B048F060T24

Rev. 2.6

Page 11 of 12

V•I Chip Bus Converter Module

+

–

+

–

V

K

+

–

+

–

1.9 µF

1.3 m

Ω

56 mA

1/8 • Iout

1/8 • Vin

10 mΩ

6.0 m

Ω

1m

Ω

35.6 µF

Lout

1.1 nH

+

–

+

K

+

–

+

–

–

V•I Chip Bus Converter Level 1 DC Behavioral Model for 48 V to 6 V, 240 W

V•I Chip Bus Converter Level 2 Transient Behavioral Model for 48 V to 6 V, 240 W

Figure 21 — This model characterizes the DC operation of the V•I Chip bus converter, including the converter transfer function and its losses. The model enables

estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation.

Figure 22 — This model characterizes the AC operation of the V•I Chip bus converter including response to output load or input voltage transients or steady state

modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load with or

without external filtering elements.

©

©

56 mA

1/8 • Iout

1/8 • Vin

6.0 m

Ω

3.2 nH

+

–

+

K

+

–

+

–

–

Load

+

–

R2

2 k

Ω

D1

SW1

Enable/Disable Switch

Input reflected ripple

measurement point

-In

PC

RSV

TM

+In

-Out

+Out

-Out

+Out

BCM

K

Ro

Figure 20 — BCM test circuit

7A

Fuse

C1

47 µF

electrolytic

C3

10 µF

R3

10 m

Ω

Notes:

Source inductance should be no more than 200 nH. If source inductance is

greater than 200 nH, additional bypass capacitance may be required.

C3 should be placed close to the load.

R3 may be ESR of C3 or a separate damping resistor.

D1 power good indicator will dim when a module fault is detected.

F1