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TMC22071A Datasheet(PDF) 15 Page - Cadeka Microcircuits LLC. |
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TMC22071A Datasheet(HTML) 15 Page - Cadeka Microcircuits LLC. |
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15 / 24 page  PRODUCT SPECIFICATION TMC22071A 15 Electrical Characteristics (for standard temperature range) Note: 1. Typical IDD with VDD = +5.0 Volts and TA = 25 °C, Maximum IDD with VDD = +5.25 Volts and TA = 0°C. Switching Characteristics (for standard temperature range) Parameter Conditions Min Typ Max Units IDD Power Supply Current1 Total Current VDD = Max, fPXCK = 30MHz 190 230 mA IREF Reference Inputcurrent VREF = +1.235V 100 mA IIH Input Current, Logic HIGH VDD = Max, VIN = 4.0V ±10 mA IIL Input Current, Logic LOW VDD = Max, VIN = 0.4V ±10 mA VOH Output Voltage, Logic HIGH IOH = -2.0 mA 2.4 V VOL Output Voltage, Logic LOW IOL = 4.0 mA 0.4 V IOZH Hi-Z Output Leakage current, HIGH VDD = Max, VIN = VDD ±10 mA IOZL Hi-Z Output Leakage current, LOW VDD = Max, VIN =GND ±10 mA Cl Digital Input Capacitance TA = 25 °C, f = 1 Mhz 4 15 pF CO Digital Output Capacitance TA - 25 °C, f = 1 Mhz 10 pF CV Input Capacitance, VIN1-3 TA = 25 °C, f = 3.58 Mhz 15 pF RV Input Resistance, VIN1-3 50 k W Parameter Conditlons Min Typ Max Units tDO Output Delay Time CLOAD = 35 pF 2 15 ns tHO Output Hold Time 3 8 ns fPCK Pixel Rate 12 15.3 MHz fPXCK Master Clock Rate 24 30.6 MHz tPWHPX PXCK Pulse Width, LOW 12 ns tPWHPX PXCK Pulse Width, HIGH 12 ns tDH Horizontal Sync to GHSYNC 14 pixels tVD Vertical Sync to GVSYNC 14 pixels tXL PXCK LOW to LDV HIGH 8 ns tXV PXCK LOW to LDV LOW 8 ns tDOM D0 enable time 20 ns tHOM D0 disable time 10 15 ns tDOZ CS LOW to D0 output driven 5 ns |
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