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SPT1018AIN Datasheet(PDF) 7 Page - Cadeka Microcircuits LLC. |
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SPT1018AIN Datasheet(HTML) 7 Page - Cadeka Microcircuits LLC. |
7 / 11 page SPT1018 Table II - Video Control Operation (Output values for set-up = 10 IRE and 75 ohm standard load) Sync Blank Ref White Bright Data Input Out - (mA) Out - (V) Out - (IRE) Description 1 X X X X 28.57 -1.071 -40 Sync Level 0 1 X X X 20.83 -0.781 0 Blank Level 0 0 1 1 X 0.00 0.000 110 Enhanced High Level 0 0 1 0 X 1.95 -0.073 100 Normal High Level 0 0 0 0 000... 19.40 -0.728 7.5 Normal Low Level 0 0 0 0 111... 1.95 -0.073 100 Normal High Level 0 0 0 1 000... 17.44 -0.654 17.5 Enhanced Low Level 0 0 0 1 111... 0.00 0.000 110 Enhanced High Level The SPT1018 is usually configured in the synchronous mode. In this mode, the controls and data are synchronized to prevent pixel dropout. This reduces screen-edge distor- tions and provides the lowest output noise while maintaining the highest conversion rate. By leaving the Feedthrough (FT) control open (low), each rising edge of the convert (CONV) clock latches decoded data and control values into a D-type internal register. The registered data is then converted into the appropriate analog output by the switched current sinks. When FT is tied high, the control inputs and data are not registered. The analog output asynchronously tracks the input data and video controls. Feedthrough itself is asynchro- nous and usually used as a DC control. The controls and data have to be present at the input pins for a set-up time of ts before, and a hold time of th after, the rising edge of the clock (CONV) in order to be synchronously registered. The set-up and hold times are not important in the asynchronous mode. The minimum pulse widths high (tPWH) and low (tPWL) as well as settling time become the limiting factors. (See figure 3.) The video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be com- patible with video system standards as described in RS-343-A. Table II shows the video control effects on the analog output. Internal logic governs Blank, Sync, and Force High so that they override the data inputs as needed in video applications. Sync overrides both the data and other controls to produce full negative video output (figure 9). Reference White video level output is provided by Force High, which drives the internal digital data to full scale output or 100 IRE units. Bright gives an additional 10% of full scale value to the output level. This function can be used in graphic displays for highlighting menus, cursors or warning mes- sages. Again, if the devices are used in non-video applica- tions, the video controls can be left open. CONVERT CLOCK For best performance, the clock should be ECL driven, differentially, by utilizing CONV and CONV (figure 4). By driving the clock this way, clock noise and power supply/ output intermodulation will be minimized. The rising edge of the clock synchronizes the data and control inputs to the SPT1018. Since the actual switching threshold of CONV is determined by CONV, the clock can be driven single-ended by connecting a bias voltage to CONV. The switching thresh- old of CONV is set by this bias voltage. ANALOG OUTPUTS The SPT1018 has two analog outputs that are high imped- ance, complementary current sinks. The outputs vary in proportion to the input data, controls and reference current values so that the full scale output can be changed by setting ISet as mentioned earlier. In video applications, the outputs can drive a doubly termi- nated 50 or 75 ohm load to standard video levels. In the standard configuration of figure 5, the output voltage is the product of the output current and load impedance and is between 0 and -1.07 V. The Out- output (figure 9) will provide a video output waveform with the Sync pulse bottom at the -1.07 V level. The Out+ is inverted with Sync up. 7 5/14/97 |
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