4

UCC284-5/-12/-ADJ

UCC384-5/-12/-ADJ

GND: This is the low noise ground reference input. All

voltages are measured with respect to the GND pin.

SD/CT: This is the shutdown pin and also the short cir-

cuit timing pin. Pulling this pin more positive than –0.6V

will put the circuit in a low current shutdown mode.

Placing a timing capacitor between this pin and GND will

set the short circuit charging time, TON during an

overcurrent condition. During an overcurrent condition,

the output will be pulsed at approximately a 2.5% duty

cycle.

Note: The CT capacitor must be connected between this pin

and GND, not VIN, to assure that the SD/CT pin is not pulled

significantly negative during power-up. This pin should not be

externally driven more negative than –5V or the device will be

damaged.

VIN: This is the negative input supply. Bypass this pin to

GND with at least 1

µF of low ESR, ESL capacitance.

VOUT: Regulated negative output voltage. A single

4.7

µF capacitor should be connected between this pin

and GND. Smaller value capacitors can be used for light

loads, but this will degrade the load step performance of

the regulator.

VOUTS: This is the feedback pin for sensing the output

of the regulator. For the UCC384-5 and UCC384-12 ver-

sions, VOUTS can be connected directly to VOUT. If the

load is placed at a considerable distance from the regu-

lator, the VOUTS lead can be used as a Kelvin connec-

tion

to

minimize

errors

due

to

lead

resistance.

Connecting VOUTS at the load will move the resistance

of the VOUT wire into the control loop of the regulator,

thereby effectively canceling the IR drop associated with

the load path.

When using a UCC384-ADJ, the output voltage can be

programmed by placing a resistor divider across the out-

put to GND. VOUTS is connected to the center tap of the

divider providing the feedback for the regulator. This con-

figuration is shown in Fig. 1.

PIN DESCRIPTIONS

Overview

The UCC384 family of NEGATIVE low dropout linear

(LDO) regulators provides a regulated output voltage for

applications with up to 0.5A of load current. The regula-

tors feature a low dropout voltage and short circuit pro-

tection,

making

their

use

ideal

for

demanding

applications requiring fault protection.

Programming the output voltage on the UCC384

The UCC384-5 and UCC384-12 have fixed output volt-

ages of –5V and –12V respectively. Connecting VOUTS

to VOUT will give the proper output voltage with respect

to ground.

The UCC384-ADJ can be programmed for any output

voltage between –1.25V and –15V. This is easily accom-

plished with the addition of an external resistor divider

connected between GND and VOUT with VOUTS con-

nected to the center tap of the divider. For an output of

–1.25V, no resistors are needed and VOUTS is con-

nected directly to VOUT. The regulator input voltage can-

not be more positive than the UVLO threshold, or

approximately –3V. Thus, low drop out cannot be

achieved when programming the output voltage more

positive than approximately –3.3V. A typical Application

circuit is shown in Fig. 1.

For the UCC384-ADJ, the output voltage is programmed

by the following equation:

VOUT

R

R

=−

• +













125

1

1

2

.

(1)

When R1 or R2 are selected to be greater than about

100k

Ω, a small ceramic capacitor should be placed

across R1 to cancel the input pole created by R1 and the

parasitic capacitance appearing on VOUTS. Values of

approximately 20pF should be adequate.

APPLICATION INFORMATION

5

4

1

3

2

R1

R2

VOUT

VOUTS

GND

6

7

VIN

VIN

VIN

VIN

CIN

VIN

8

CT

SD/CT

COUT

VOUT

+

+

(+)

(–)

(+)

(–)

C1

UCC384-ADJ

1

µF

4.7

µF

0.015

µF

Figure 1. Typical application schematic.

UDG-99029

Note 1: R1 and R2 for –ADJ version only. For –5 and –12

versions, connect VOUTS to VOUT.