UCC1890

UCC2890

UCC3890

100mV

= C

then the regulator output will assist the battery, minimiz-

ing or eliminating battery output current.

DESIGN EXAMPLE

A typical design has the following requirements:

=

80 to 132 VAC or 100 to 180 VDC

=

1.25V

′

=

750mV forward drop in D3)

=

500mADC max

100kHz

η (eff.)

=

50% (excluding efficiency losses in

D3 which will be very large due to the

low output voltage. Losses in D3 are

′ in the

calculations).

Component values are indicated in Figure 3. The expla-

nation for the choices in component values follows.

First calculate the maximum duty cycle, d(max). To cal-

culate this assume that at maximum load/minimum line

conditions, the converter will be at the continuous con-

duction boundary and there will be no idle time after the

inductors are discharged. For all other load/line condi-

tions, the UCC3890 will stretch the off time, to create an

idle time after the inductors are discharged, in order to

maintain a constant output voltage. For a single flyback

stage at continuous conduction boundary

d

=

1

1

+

For the cascaded flyback stages of the UCC3890 topol-

ogy, the corresponding equation is

d

(max) =

1

1

+

′

in this case

d

(max) =

1

1

+

100V

2V

= 0.125

Next using the operating frequency and the maximum

duty cycle to calculate the maximum on time

TON

(max) =

d

(max)

in this case

TON

(max) =

0.125

100kHz

correspondingly

TOFF

(min) =

1

− 0.125

100kHz

= 8.75µs

Figure 3. Example Application

UDG-96056

APPLICATION INFORMATION (cont.)

5