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UCC1890 Datasheet(PDF) 5 Page - Texas Instruments |
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UCC1890 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 8 page UCC1890 UCC2890 UCC3890 If RSH2 is chosen so that 100mV RSH2 = C then the regulator output will assist the battery, minimiz- ing or eliminating battery output current. DESIGN EXAMPLE A typical design has the following requirements: VIN = 80 to 132 VAC or 100 to 180 VDC VOUT = 1.25V VOUT ′ = 2.0V (assumes 1.25 VOUT with 750mV forward drop in D3) ILOAD = 500mADC max FSWITCHING = 100kHz η (eff.) = 50% (excluding efficiency losses in D3 which will be very large due to the low output voltage. Losses in D3 are accounted for by using VOUT ′ in the calculations). Component values are indicated in Figure 3. The expla- nation for the choices in component values follows. First calculate the maximum duty cycle, d(max). To cal- culate this assume that at maximum load/minimum line conditions, the converter will be at the continuous con- duction boundary and there will be no idle time after the inductors are discharged. For all other load/line condi- tions, the UCC3890 will stretch the off time, to create an idle time after the inductors are discharged, in order to maintain a constant output voltage. For a single flyback stage at continuous conduction boundary d = 1 1 + VIN VOUT For the cascaded flyback stages of the UCC3890 topol- ogy, the corresponding equation is d (max) = 1 1 + √VIN VOUT ′ in this case d (max) = 1 1 + √ 100V 2V = 0.125 Next using the operating frequency and the maximum duty cycle to calculate the maximum on time TON (max) = d (max) FSWITCHING in this case TON (max) = 0.125 100kHz = 1.25µs correspondingly TOFF (min) = 1 − 0.125 100kHz = 8.75µs Figure 3. Example Application UDG-96056 APPLICATION INFORMATION (cont.) 5 |
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