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CY2310ANZ
Document #: 38-07142 Rev. *C
Page 2 of 9
Pin Configuration
Figure 1. Pin Diagram: 28-Pin SSOP
Table 1. Pin Summary
Name
Pins
Description
VDD
1, 5, 10, 19, 24, 28
3.3V Digital voltage supply
VSS
4, 8, 12, 17, 21, 25
Ground
VDDIIC
13
Serial interface voltage supply
VSSIIC
16
Ground for serial interface
BUF_IN
9
Input clock
OE
20
Output Enable, three-states outputs when LOW. Internal pull up to VDD
SDATA
14
Serial data input, internal pull-up to VDD
SCLK
15
Serial clock input, internal pull-up to VDD
SDRAM [0–3]
2, 3, 6, 7
SDRAM byte 0 clock outputs
SDRAM [4–7]
22, 23, 26, 27
SDRAM byte 1 clock outputs
SDRAM [8–9]
11, 18
SDRAM byte 2 clock outputs
1
2
3
4
VDD
SDRAM7
SDRAM6
VSS
VDD
SDRAM5
Top View
8
5
6
7
12
9
10
11
13
14
28
27
26
25
21
24
23
22
17
20
19
18
16
15
SDRAM4
VSS
OE
VDD
SDRAM9
VSS
VSSIIC
SCLOCK
VDD
SDRAM0
SDRAM1
VSS
VDD
SDRAM2
VSS
BUF_IN
VDD
SDRAM8
VSS
VDDIIC
SDATA
SDRAM3
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