CY8C21123, CY8C21223, CY8C21323
Document Number: 38-12022 Rev. *K
Page 7 of 36
Pin Information
This section describes, lists, and illustrates the CY8C21x23 PSoC device pins and pinout configurations. Every port pin (labeled with
a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRES are not capable of Digital IO.
8-Pin Part Pinout
16-Pin Part Pinout
Table 3. Pin Definitions - CY8C21123 8-Pin SOIC
Pin
No.
Type
Pin
Name
Description
Figure 3. CY8C21123 8-Pin SOIC
Digital
Analog
1
IO
I
P0[5]
Analog Column Mux Input
2
IO
I
P0[3]
Analog Column Mux Input
3
IO
P1[1]
I2C Serial Clock (SCL), ISSP-SCLK[3]
4
Power
Vss
Ground Connection
5
IO
P1[0]
I2C Serial Data (SDA), ISSP-SDATA[3]
6
IO
I
P0[2]
Analog Column Mux Input
7
IO
I
P0[4]
Analog Column Mux Input
8
Power
Vdd
Supply Voltage
LEGEND: A = Analog, I = Input, and O = Output.
SOIC
1
2
3
4
8
7
6
5
Vdd
P0[4], A, I
P0[2], A, I
P1[0], I2CSDA
A, I, P0[5]
A, I, P0[3]
I2C SCL, P1[1]
Vss
Table 4. Pin Definitions - CY8C21223 16-Pin SOIC
Pin
No.
Type
Pin
Name
Description
Figure 4. CY8C21223 16-Pin SOIC
Digital
Analog
1
IO
I
P0[7]
Analog Column Mux Input
2
IO
I
P0[5]
Analog Column Mux Input
3
IO
I
P0[3]
Analog Column Mux Input
4
IO
I
P0[1]
Analog Column Mux Input
5
Power
SMP
Switch Mode Pump (SMP) Connection to
required External Components
6
Power
Vss
Ground Connection
7
IO
P1[1]
I2C Serial Clock (SCL), ISSP-SCLK[3]
8
Power
Vss
Ground Connection
9
IO
P1[0]
I2C Serial Data (SDA), ISSP-SDATA[3]
10
IO
P1[2]
11
IO
P1[4]
Optional External Clock Input (EXTCLK)
12
IO
I
P0[0]
Analog Column Mux Input
13
IO
I
P0[2]
Analog Column Mux Input
14
IO
I
P0[4]
Analog Column Mux Input
15
IO
I
P0[6]
Analog Column Mux Input
16
Power
Vdd
Supply Voltage
LEGEND A = Analog, I = Input, and O = Output.
SOIC
Vdd
P0[6],A,I
P0[4],A,I
P0[2],A,I
P0[0],A,I
P1[4],EXTCLK
P1[2]
P1[0],I2CSDA
16
15
14
13
12
11
1
2
3
4
5
6
7
8
A,I,P0[7]
A, I,P0[5]
A, I,P0[3]
A, I,P0[1]
SMP
Vss
I2CSCL,P1[1]
Vss
10
9
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