CY8C20234, CY8C20334
CY8C20434, CY8C20534
Document Number: 001-05356 Rev. *H
Page 7 of 34
Pin Information
This section describes, lists, and illustrates the CY8C20234, CY8C20334, CY8C20434, and CY8C20534 PSoC device pins and pinout
configurations.
The CY8C20x34 PSoC device is available in a variety of packages that are listed and shown in the following tables. Every port pin
(labeled with a “P”) is capable of Digital I/O and connection to the common analog bus. However, Vss, Vdd, and XRES are not capable
of Digital I/O.
16-Pin Part Pinout
Figure 2. CY8C20234 16-Pin PSoC Device
Table 2. Pin Definitions - CY8C20234 16-Pin (QFN)
Pin No.
Type
Name
Description
Digital
Analog
1
I/O
I
P2[5]
2
I/O
I
P2[1]
3
IOH
I
P1[7]
I2C SCL, SPI SS
4
IOH
I
P1[5]
I2C SDA, SPI MISO
5
IOH
I
P1[3]
SPI CLK
6
IOH
I
P1[1]
CLK[1], I2C SCL, SPI MOSI
7
Power
Vss
Ground Connection
8
IOH
I
P1[0]
DATA[1], I2C SDA
9
IOH
I
P1[2]
10
IOH
I
P1[4]
Optional External Clock Input (EXTCLK)
11
Input
XRES
Active High External Reset with Internal Pull Down
12
I/O
I
P0[4]
13
Power
Vdd
Supply Voltage
14
I/O
I
P0[7]
15
I/O
I
P0[3]
Integrating Input
16
I/O
I
P0[1]
A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive
QFN
(Top View)
AI, P2[5]
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI MISO, P1[5]
1
2
3
4
11
10
9
P0[4], AI
P1[2], AI
AI, P2[1]
P1[4], AI, EXTCLK
XRES
12
Note
1. These are the ISSP pins, that are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for details.
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
