CY7C1516KV18, CY7C1527KV18
CY7C1518KV18, CY7C1520KV18
Document Number: 001-00437 Rev. *E
Page 9 of 30
Programmable Impedance
An external resistor, RQ, must be connected between the ZQ pin
on the SRAM and VSS to allow the SRAM to adjust its output
driver impedance. The value of RQ must be 5x the value of the
intended line impedance driven by the SRAM. The allowable
range of RQ to guarantee impedance matching with a tolerance
of ±15% is between 175
Ω and 350Ω, with VDDQ =1.5V. The
output impedance is adjusted every 1024 cycles upon power up
to account for drifts in supply voltage and temperature.
Echo Clocks
Echo clocks are provided on the DDR-II to simplify data capture
on high speed systems. Two echo clocks are generated by the
DDR-II. CQ is referenced with respect to C and CQ is referenced
with respect to C. These are free running clocks and are synchro-
nized to the output clock of the DDR-II. In single clock mode, CQ
is generated with respect to K and CQ is generated with respect
to K. The timing for the echo clocks is shown in the Switching
Characteristics on page 23.
PLL
These chips use a PLL that is designed to function between
120 MHz and the specified maximum clock frequency. During
power up, when the DOFF is tied HIGH, the PLL is locked after
20
μs of stable clock. The PLL can also be reset by slowing or
stopping the input clock K and K for a minimum of 30 ns.
However, it is not necessary to reset the PLL to lock to the
desired frequency. The PLL automatically locks 20
μs after a
stable clock is presented. The PLL may be disabled by applying
ground to the DOFF pin. When the PLL is turned off, the device
behaves in DDR-I mode (with one cycle latency and a longer
access time).
Application Example
Figure 1 shows two DDR-II used in an application.
Figure 1. Application Example
Vterm = 0.75V
Vterm = 0.75V
R = 50
ohms
R = 250
ohms
LD#
C C#
R/W#
DQ
A
K
LD#
C C#
R/W#
DQ
A
K
SRAM#1
SRAM#2
R
= 250ohms
BUS
MASTER
(CPU
or
ASIC)
DQ
Addresses
Cycle Start#
R/W#
Return CLK
Source CLK
Return CLK#
Source CLK#
Echo Clock1/Echo Clock#1
Echo Clock2/Echo Clock#2
ZQ
CQ/CQ#
K#
ZQ
CQ/CQ#
K#
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