CY7C024/024A/0241
CY7C025/0251
Document #: 38-06035 Rev. *D
Page 5 of 21
Semaphores are accessed by asserting SEM LOW. The SEM
pin functions as a chip select for the semaphore latches (CE
must remain HIGH during SEM LOW). A0–2 represents the
semaphore address. OE and R/W are used in the same manner
as a normal memory access. When writing or reading a
semaphore, the other address pins have no effect.
When writing to the semaphore, only I/O0 is used. If a zero is
written to the left port of an available semaphore, a one appears
at the same semaphore address on the right port. That
semaphore can now only be modified by the side showing zero
(the left port in this case). If the left port now relinquishes control
by writing a one to the semaphore, the semaphore is set to one
for both sides. However, if the right port had requested the
semaphore (written a zero) while the left port had control, the
right port immediately owns the semaphore as soon as the left
port released it. Table 3 shows sample semaphore operations.
When reading a semaphore, all sixteen/eighteen data lines
output the semaphore value. The read value is latched in an
output register to prevent the semaphore from changing state
during a write from the other port. If both ports attempt to access
the semaphore within tSPS of each other, the semaphore is
definitely obtained by one side or the other, but there is no
guarantee which side controls the semaphore
Table 1. Non-Contending Read/Write
Inputs
Outputs
Operation
CE
R/W
OE
UB
LB
SEM
I/O0–I/O7
[3]
I/O8–I/O15
[4]
H
X
X
X
X
H
High Z
High Z
Deselected: Power Down
X
X
X
H
H
H
High Z
High Z
Deselected: Power Down
L
L
X
L
H
H
High Z
Data In
Write to Upper Byte Only
L
L
X
H
L
H
Data In
High Z
Write to Lower Byte Only
L
L
X
L
L
H
Data In
Data In
Write to Both Bytes
L
H
L
L
H
H
High Z
Data Out
Read Upper Byte Only
L
H
L
H
L
H
Data Out
High Z
Read Lower Byte Only
L
H
L
L
L
H
Data Out
Data Out
Read Both Bytes
X
X
H
X
X
X
High Z
High Z
Outputs Disabled
H
H
L
X
X
L
Data Out
Data Out
Read Data in Semaphore Flag
X
H
L
H
H
L
Data Out
Data Out
Read Data in Semaphore Flag
H
X
X
X
L
Data In
Data In
Write DIN0 into Semaphore Flag
X
X
H
H
L
Data In
Data In
Write DIN0 into Semaphore Flag
L
X
X
L
X
L
Not Allowed
L
X
X
X
L
L
Not Allowed
Table 2. Interrupt Operation Example (Assumes BUSYL=BUSYR=HIGH)
[7]
Function
Left Port
Right Port
R/WL
CEL
OEL
A0L–11L
INTL
R/WR
CER
OER
A0R–11R
INTR
Set Right INTR Flag
L
L
X
(1)FFF
X
X
X
X
X
L[9]
Reset Right INTR Flag
X
X
X
X
X
X
L
L
(1)FFF
H[8]
Set Left INTL Flag
X
X
X
X
L[8]
LL
X
(1)FFE
X
Reset Left INTL Flag
X
L
L
(1)FFE
H[9]
XX
X
X
X
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