CY7C145-55AC datasheet(9/20 Pages) CYPRESS

Part #	CY7C145-55AC

Description	8K x 8/9 Dual-Port Static RAM with SEM, INT, BUSY

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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CY7C144, CY7C145

Document #: 38-06034 Rev. *E

Page 9 of 20

BUSY TIMING[13]

tBLA

BUSY LOW from Address

Match

15

20

30

ns

tBHA

BUSY HIGH from Address

Mismatch

15

20

30

ns

tBLC

BUSY LOW from CE LOW

1520

2030

ns

tBHC

BUSY HIGH from CE HIGH

15

20

30

ns

tPS

Port Set-Up for Priority

5

ns

tWB

R/W LOW after BUSY LOW

0

ns

tWH

R/W HIGH after BUSY HIGH

13

20

30

ns

tBDD

BUSY HIGH to Data Valid

15

25

35

55

ns

INTERRUPT TIMING[13]

tINS

INT Set Time

15

25

35

ns

tINR

INT Reset Time

15

25

35

ns

SEMAPHORE TIMING

tSOP

SEM Flag Update Pulse (OE or

SEM)

10

15

20

ns

tSWRD

SEM Flag Write to Read Time

5

ns

tSPS

SEM Flag Contention

Window

55

5

ns

Switching Characteristics (continued)

Over the Operating Range[8]

Parameter

Description

7C144-15

7C145-15

7C144-25

7C145-25

7C144-35

7C145-35

7C144-55

7C145-55

Unit

Min

Max

Min

Max

Min

Max

Min

Max

Note

13. Test conditions used are Load 2.

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