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TPS62224DDCTG4 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS62224DDCTG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 24 page DETAILED DESCRIPTION OPERATION POWER-SAVE MODE OPERATION I skip v 66 mA ) Vin 160 W I peak + 66 mA ) Vin 80 W TPS62220 ,, TPS62221,, TPS62222 TPS62223, TPS62224, TPS62225 TPS62227, TPS62228, TPS62229 SLVS491E – SEPTEMBER 2003 – REVISED FEBRUARY 2009....................................................................................................................................... www.ti.com The TPS6222x is a synchronous step-down converter operating with typically 1.25-MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents and in power-save mode operating with pulse frequency modulation (PFM) at light load currents. During PWM operation, the converter uses a unique fast response, voltage mode, controller scheme with input voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel MOSFET switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is exceeded. Then, the N-channel rectifier switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock signal, again turning off the N-channel rectifier and turning on the P-channel switch. The GM amplifier and input voltage determines the rise time of the sawtooth generator; therefore, any change in input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line and load transient regulation. As the load current decreases, the converter enters the power-save mode operation. During power-save mode, the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. Two conditions allow the converter to enter the power-save mode operation. One is when the converter detects discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as: During the power-save mode, the output voltage is monitored with the comparator (comp) by the thresholds comp low and comp high. As the output voltage falls below the comp low threshold set to 0.8% typical above Vout, the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached. The typical peak switch current can be calculated: The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches zero, the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse. The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout) is reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again as the output voltage falls below the comp low threshold. This control method reduces the quiescent current typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving high converter efficiency at light load. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load transient changes. This allows the converter to operate with a small output capacitor of just 10 µF and still have a low absolute voltage drop during heavy load transient changes. See Figure 14 for detailed operation of the power-save mode. 10 Submit Documentation Feedback Copyright © 2003–2009, Texas Instruments Incorporated Product Folder Link(s): TPS62220 TPS62221 TPS62222 TPS62223 TPS62224 TPS62225 TPS62227 TPS62228 TPS62229 |
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