DEVICE INFORMATION

PIN ASSIGNMENT TOP VIEW

16 15 14 13

5

6

7

8

1

2

3

4

9

GND

GND

FB

AGND

PGND

Exposed

Thermal

Pad

VIN

VIN

EN

12

11

10

TPS62110, TPS62111

TPS62112, TPS62113

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

AGND

9

I

Analog ground, connect to GND and PGND

Enable. A logic high enables the converter; logic low forces the device into shutdown mode reducing the

EN

4

I

supply current to less than 2 µA.

Feedback pin for the fixed output voltage option. For the adjustable version, an external resistive divider

FB

10

I

is connected to this pin. The internal voltage divider is disabled for the adjustable version.

GND

11, 12

I

Ground

LBI

7

I

Low-battery input

LBO

6

O

Open-drain, low-battery output. This pin is pulled low if LBI is below its threshold.

Power good comparator output. This is an open-drain output. A pullup resistor should be connected

PG

13

O

between PG and VOUT. The output goes active high when the output voltage is greater than 98.4% of

the nominal value.

PGND

1, 16

I

Power ground. Connect all power grounds to this pin.

Connect the inductor to this pin. This pin is the switch pin and connected to the drain of the internal

SW

14, 15

O

power MOSFETS.

Input for synchronization to external clock signal. Synchronizes the converter switching frequency to an

external clock signal with CMOS level:

SYNC

5

I

SYNC = HIGH: Low-noise mode enabled, fixed frequency PWM operation is forced

SYNC = LOW (GND): Power save mode enabled, PFM/PWM Mode enabled

VIN

2, 3

I

Supply voltage input (power stage)

VINA

8

I

Supply voltage input (support circuits)

Thermal pad

Connect to AGND

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Product Folder Link(s): TPS62110 TPS62111 TPS62112 TPS62113