TUSB2046B, TUSB2046BI

4PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS413B − FEBRUARY 2000 − REVISED DECEMBER 2004

10

POST OFFICE BOX 655303

APPLICATION INFORMATION

input clock configuration (continued)

clock input on TSTPLL/48MCLK (terminal 27). XTAL2 must be left floating (open) for this configuration. Only

the oscillator or the onboard clock source is accepted for this mode. A crystal can not be used for this mode,

since the chip’s internal oscillator cell only supports the fundamental frequency.

30

29

31

27

XTAL1

XTAL2

TSTMODE

TSTPLL/48MCLK

TUSB2046B USB HUB

Open

48-MHz Oscillator

or on Board Clock Source

3.3 V

Figure 8. 48-MHz Input Clock Configuration

Figure 9 is a block diagram example of how to connect the external EEPROM if a custom product ID and vendor

ID are desired.

Figure 10 shows the EEPROM read operation timing diagram. Figures 11, 12, and 13 illustrate how to connect

the TUSB2046B device for different power source and port power-management combinations.

1 k

Ω

DP0

DM0

EEDATA

TUSB2046B USB Hub

System

Power-On Reset

Regulator

Power

Switching

OVRCUR1 −

OVRCUR4

PWRON1 −

PWRON4

EECLK

RESET

XTAL1

EXTMEM

VCC

GND

DP1 − DP4

DM1 − DM4

GND

Vbus

5 V GND

XTAL2

USB Data lines

and Power to

Downstream

Ports

Bus or Local Power

6-MHz Clock

Signal

4

4

4

4

30

29

4

1

2

6

5

3, 25

7, 28

12, 16, 20, 24

10, 14, 18, 22

11, 15, 19, 23

9, 13, 17, 21

5

8

6

2

4

3

ORG

VCC

VSS

D

Q

C

S

1

EEPROM

3.3 V

26

Figure 9. Typical Application of the TUSB2046B USB Hub