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TMX320C6748ZWTA3 Datasheet(PDF) 2 Page - Texas Instruments |
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TMX320C6748ZWTA3 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 242 page TMS320C6748 Fixed/Floating-Point DSP SPRS590 – JUNE 2009 www.ti.com – Supports Multiple Interfaces with START, • USB 2.0 OTG Port With Integrated PHY (USB0) ENABLE and WAIT Controls – USB 2.0 High-/Full-Speed Client • Serial ATA (SATA) Controller: – USB 2.0 High-/Full-/Low-Speed Host – Supports SATA I (1.5 Gbps) and SATA II – End Point 0 (Control) (3.0 Gbps) – End Points 1,2,3,4 (Control, Bulk, Interrupt – Supports all SATA Power Management or ISOC) Rx and Tx Features • One Multichannel Audio Serial Port: – Hardware-Assisted Native Command – Transmit/Receive Clocks up to 50 MHz Queueing (NCQ) for up to 32 Entries – Two Clock Zones and 16 Serial Data Pins – Supports Port Multiplier and – Supports TDM, I2S, and Similar Formats Command-Based Switching – DIT-Capable • Real-Time Clock With 32 KHz Oscillator and – FIFO buffers for Transmit and Receive Separate Power Rail • Two Multichannel Buffered Serial Ports: • Three 64-Bit General-Purpose Timers – Transmit/Receive Clocks up to 50 MHz (Configurable as Two 32-Bit Timers) – Two Clock Zones and 16 Serial Data Pins • One 64-Bit General-Purpose Timer (Watch – Supports TDM, I2S, and Similar Formats Dog) – AC97 Audio Codec Interface • Two Enhanced Pulse Width Modulators – Telecom Interfaces (ST-Bus, H100) (eHRPWM): – 128-channel TDM – Dedicated 16-Bit Time-Base Counter With – FIFO buffers for Transmit and Receive Period And Frequency Control • 10/100 Mb/s Ethernet MAC (EMAC): – 6 Single Edge, 6 Dual Edge Symmetric or 3 – IEEE 802.3 Compliant Dual Edge Asymmetric Outputs – MII Media Independent Interface – Dead-Band Generation – RMII Reduced Media Independent Interface – PWM Chopping by High-Frequency Carrier – Management Data I/O (MDIO) Module – Trip Zone Input • Video Port Interface (VPIF): • Three 32-Bit Enhanced Capture Modules – Two 8-bit SD (BT.656), Single 16-bit or (eCAP): Single Raw (8-/10-/12-bit) Video Capture – Configurable as 3 Capture Inputs or 3 Channels Auxiliary Pulse Width Modulator (APWM) – Two 8-bit SD (BT.656), Single 16-bit Video outputs Display Channels – Single Shot Capture of up to Four Event Time-Stamps • Universal Parallel Port (uPP): – High-Speed Parallel Interface to FPGAs and • 361-Ball Pb-Free Plastic Ball Grid Array Data Converters (PBGA) [ZCE Suffix], 0.65-mm Ball Pitch – Data Width on Each of Two Channels is 8- • 361-Ball Pb-Free Plastic Ball Grid Array to 16-bit Inclusive (PBGA) [ZWT Suffix], 0.80-mm Ball Pitch – Single Data Rate or Dual Data Rate • Commercial or Extended Temperature Transfers 2 TMS320C6748 Fixed/Floating-Point DSP Submit Documentation Feedback |
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