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ADS62P49 Datasheet(PDF) 41 Page - Texas Instruments

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Part No. ADS62P49
Description  Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS62P49 Datasheet(HTML) 41 Page - Texas Instruments

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TA − Free-Air Temperature − °C
72.50
72.75
73.00
73.25
73.50
73.75
74.00
−40
−20
0
20
40
60
80
G030
AVDD = 3.6 V
AVDD = 3.3 V
AVDD = 3.15 V
DRVDD = 1.8 V
fIN = 20 MHz
70
71
72
73
74
75
76
77
78
DRVDD − Supply Voltage − V
G031
SNR
SFDR
AVDD = 3.3 V
fIN = 20 MHz
78
79
80
81
82
83
84
85
86
1.70
1.74
1.78
1.82
1.86
1.90
70
71
72
73
74
75
76
77
78
Input Clock Amplitude − VPP
G032
74
76
78
80
82
84
86
88
90
0.0
0.5
1.0
1.5
2.0
2.5
SNR
SFDR
fIN = 60 MHz
70
71
72
73
74
75
76
77
78
Input Clock Duty Cycle − %
G033
SNR
SFDR
fIN = 20 MHz
78
80
82
84
86
88
90
92
94
30
35
40
45
50
55
60
65
70
72
74
76
78
80
VVCM − VCM Voltage − V
G034
80
82
84
86
88
90
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
fIN = 60 MHz
External Reference Mode
SNR
SFDR
ADS62P49 / ADS62P29
ADS62P48 / ADS62P28
www.ti.com............................................................................................................................................................. SLAS635A – APRIL 2009 – REVISED JUNE 2009
TYPICAL CHARACTERISTICS – ADS62P48 (continued)
All plots are at 25°C, AVDD = 3.3 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock. 1.5 VPP
differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain,
LVDS output interface, 32K point FFT (unless otherwise noted)
SNR vs AVDD SUPPLY VOLTAGE
PERFORMANCE vs DRVDD SUPPLY VOLTAGE
Figure 44.
Figure 45.
PERFORMANCE vs INPUT CLOCK AMPLITUDE
PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 46.
Figure 47.
PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 48.
Copyright © 2009, Texas Instruments Incorporated
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Product Folder Link(s): ADS62P49 / ADS62P29 ADS62P48 / ADS62P28


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