TPS767D301, TPS767D318, TPS767D325

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

SLVS209B – JULY 1999 – REVISED APRIL 2000

16

POST OFFICE BOX 655303

external capacitor requirements (continued)

When necessary to achieve low height requirements along with high output current and/or high ceramic load

capacitance, several higher ESR capacitors can be used in parallel to meet the previous guidelines.

RESET

OUT

OUT

6

5

4

IN

IN

EN

GND

3

28

24

23

VI

C1

0.1

µF

50 V

RESET

VO

10

µF

+

TPS767D3xx

CO

250 k

Ω

Figure 26. Typical Application Circuit (Fixed Versions) for Single Channel

programming the TPS767D301 adjustable LDO regulator

The output voltage of the TPS767D301 adjustable regulator is programmed using an external resistor divider

as shown in Figure 27. The output voltage is calculated using:

V

O +

V

ref

1

) R1

R2

(1)

Where:

Resistors R1 and R2 should be chosen for approximately 50-

µA divider current. Lower value resistors can be

used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage

currents at FB increase the output voltage error. The recommended design procedure is to choose

R2 = 30.1 k

Ω to set the divider current at 50 µA and then calculate R1 using:

R1

+

V

O

V

ref

* 1

R2

(2)

OUTPUT

VOLTAGE

R1

R2

2.5 V

3.3 V

3.6 V

4 75V

UNIT

33.2

53.6

61.9

90.8

30.1

30.1

30.1

30.1

k

Ω

k

Ω

k

Ω

k

Ω

OUTPUT VOLTAGE

PROGRAMMING GUIDE

VO

VI

RESET

OUT

FB / NC

R1

R2

GND

EN

IN

<0.5V

>2.7 V

TPS767D301

RESET Output

0.1

µF

250 k

Ω

+

10

µF

CO

Figure 27. TPS767D301 Adjustable LDO Regulator Programming