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PO54G374A Datasheet(PDF) 4 Page - Potato Semiconductor Corporation |
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PO54G374A Datasheet(HTML) 4 Page - Potato Semiconductor Corporation |
4 / 6 page 4 Copyright © Potato Semiconductor Corporation Test Waveforms Test Circuit Ω 50 50pF to 2pF VM th tsu Data Input Timing Input VI 0 V VI 0 V 0 V tw Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL tPLH VOH VOH VOL VOL VI 0 V Input Output Waveform 1 S1 at VLOAD (see Note B) Output Waveform 2 S1 at GND (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ VLOAD/2 0 V VOL + VΔ VOH - VΔ ≈0 V VI VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output Output Output Control VM VM VM VM VM VM VM VM VM VM VM VM VI VM VM Pulse Generator D.U.T Vcc 54, 74 Series GHz Logic PO54G374A, PO74G374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS 10/22/07 |
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