 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PO74G74ASiR Datasheet(PDF) 4 Page - Potato Semiconductor Corporation |
|
||||||||||||||||||||||||||||||
PO74G74ASiR Datasheet(HTML) 4 Page - Potato Semiconductor Corporation |
|
|
4 / 6 page  4 Copyright © Potato Semiconductor Corporation Test Waveforms Test Circuit Ω 50 15pF to 2pF VM th tsu Data Input Timing Input VI 0 V VI 0 V 0 V tw Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL tPLH VOH VOH VOL VOL VI 0 V Input Output Waveform 1 S1 at VLOAD (see Note B) Output Waveform 2 S1 at GND (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ VLOAD/2 0 V VOL + VΔ VOH - VΔ ≈0 V VI VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output Output Output Control VM VM VM VM VM VM VM VM VM VM VM VM VI VM VM Pulse Generator D.U.T Vcc 54, 74 Series GHz Logic PO54G74A, PO74G74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 10/10/07 |
Similar Part No. - PO74G74ASiR |
|
Similar Description - PO74G74ASiR |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
