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PCS3P7101AG-08SR Datasheet(PDF) 2 Page - PulseCore Semiconductor |
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PCS3P7101AG-08SR Datasheet(HTML) 2 Page - PulseCore Semiconductor |
2 / 7 page September 2006 PCS3P7101A rev 0.1 Notice: The information in this document is subject to change without notice. Low Power Peak EMI Reducing clock synthesizer 2 of 7 Pin Configuration Pin Description Pin # Pin Name Type Description 1 CLKIN/XIN I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or to an external reference clock. 2 VDD P Power supply for the entire chip. 3 VSS P Ground connection 4 NC - No Connection 5 ModOUT O Spread spectrum low EMI 4x clock output. 6 NC - No Connection 7 I Powers down entire chip. Tri-states CLK outputs when low. Has an Internal pull-up resistor. 8 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to Ground -0.5 to +4.6 V TSTG Storage temperature -65 to +125 °C TA Operating temperature 0 to +70 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD 22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended Operating Conditions 1 Parameter Min Typ Max Unit Supply voltage, VDD 3.15 3.3 3.45 V Low-level input voltage, VIL VDD = 3.15V to3.45V - - 0.8 V High-level input voltage, VIH VDD = 3.15V to3.45V 2 - - V High-level output current, IOH VDD = 3.15V to3.45V - - 12 mA Low-level output current, IOL VDD = 3.15V to3.45V - - 12 mA Operating free-air temperature, TA 0 - 70 °C Note:1 Unused inputs must be held high or low to prevent them from floating. 1 2 3 4 5 6 7 8 NC XOUT ModOUT CLKIN/XIN VDD VSS NC PCS3P7101A PD PD |
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