September 2006

PCS2P3805A

rev 0.3

3.3V CMOS Buffer Clock Driver

4 of 12

Notice: The information in this document is subject to change without notice.

DC Electrical Characteristics over Operating Range

Following Conditions Apply Unless Otherwise Specified

Symbol

Parameter

Test Conditions

1

Min

Typ

2

Max

Unit

Input HIGH Level (Input pins)

2

5.5

Input HIGH Level (I/O pins)

Guaranteed Logic HIGH Level

2

V

Input LOW Level

(Input and I/O pins)

Guaranteed Logic LOW Level

-0.5

0.8

V

Input HIGH Current (Input pins)

±1

Input HIGH Current (I/O pins)

±1

Input LOW Current (Input pins)

±1

Input LOW Current (I/O pins)

±1

µA

±1

High Impedance Output Current

(3-State Output Pins)

±1

µA

Clamp Diode Voltage

-0.7

-1.2

V

Output HIGH Current

3

-36

-60

-110

mA

Output LOW Current

3

50

90

200

mA

Output HIGH Voltage

2.4

5

3

V

0.2

0.2

0.4

Output LOW Voltage

0.3

0.5

V

Input Power Off Leakage

±1

µA

Short Circuit Current

4

3

-60

-135

-240

mA

Input Hysteresis

150

mV

Quiescent Power Supply

Current

0.1

10

µA

Notes:1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.