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PCS2P3805EG-20-DT Datasheet(PDF) 6 Page - PulseCore Semiconductor |
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PCS2P3805EG-20-DT Datasheet(HTML) 6 Page - PulseCore Semiconductor |
6 / 11 page September 2006 PCS2P3805E rev 0.3 3.3V CMOS Dual 1-To-5 Clock Driver 6 of 11 Notice: The information in this document is subject to change without notice. Test Circuits and Waveforms Switch Position Test Conditions Symbol VCC = 3.3V ±0.3V Unit CL 15 pF RT ZOUT of pulse generator Ω RL 33 Ω tR / tF 1 (0V to 3V or 3V to 0V) nS Definitions: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. Test Switch Disable Low Enable Low 6V Disable High Enable High GND RL VCC RT Pulse Generator VIN D.U.T CL CL = 15pF Test Circuit VOUT INPUT 0V tPLH1 tPHL1 1.5V 3V VOH 1.5V VOL OUTPUT 1 tSK(O) = | tPLH2 - tPLH1 | or | tPHL2 -tPHL1 | tSK(O) tSK(O) tPLH2 tPHL2 VOH 1.5V VOL OUTPUT 2 Output Skew – tSK(o) VCC RT Pulse Generator VIN D.U.T CL GND 6V 500Ω 500Ω VOUT Enable and Disable Time Circuit Open RL |
Similar Part No. - PCS2P3805EG-20-DT |
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Similar Description - PCS2P3805EG-20-DT |
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