September 2006

PCS2I9940L

rev 1.1

Notice: The information in this document is subject to change without notice.

PulseCore Semiconductor Corporation

1715 S. Bascom Ave Suite 200, Campbell, CA 95008

• Tel: 408-879-9077 • Fax: 408-879-9018

www.pulsecoresemi.com

Low Voltage 1:18 Clock Distribution Chip

Features

•

LVPECL or LVCMOS Clock Input

•

2.5V LVCMOS Outputs for Pentium II

Microprocessor Support*

•

150pS Maximum Output-to-Output Skew

•

Maximum Output Frequency of 250MHz

•

32 Lead LQFP & TQFP Packaging

•

Dual or Single Supply Device:

•

Output

•

•

•

Pin and Function compatible to MPC940L,

MPC9109, CY29940 and CY29940-1

Functional Description

The PCS2I9940L is a 1:18 low Voltage Clock distribution

chip with 2.5V or 3.3V LVCMOS output capabilities. The

device features the capability to select either a differential

LVPECL or LVCMOS compatible input. The 18 outputs are

2.5V or 3.3V LVCMOS compatible and feature the drive

strength to drive 50

Ω series or parallel terminated

transmission lines. With output-to-output skews of 150pS,

the PCS2I9940L is ideal as a clock distribution chip for the

most demanding of Synchronous systems. The 2.5V

outputs also make the device ideal for supplying clocks for

a high performance microprocessor based design.

With low output impedance (

≈20Ω), in both the HIGH and

LOW logic states, the output buffers of the PCS2I9940L are

ideal for driving series terminated transmission lines. With a

20

Ω output impedance the PCS2I9940L has the capability

of driving two series terminated lines from each output.

This gives the device an effective fanout of 1:36.

The differential LVPECL inputs of the PCS2I9940L allow

the device to interface directly with a LVPECL fanout buffer

to build very wide clock fanout trees or to couple to a high

frequency clock source. The LVCMOS input provides a

more standard interface for applications requiring only a

single clock distribution chip at relatively low frequencies. In

addition, the two clock sources can be used to provide for a

test clock interface as well as the primary system clock. A

logic HIGH on the LVCMOS_CLK_Sel pin will select the

LVCMOS level clock input. All inputs of the PCS2I9940L

have internal

pullup/pulldown resistor, so they can be left

open if unused.

The PCS2I9940L is a single or dual supply device. The

device power supply offers a high degree of flexibility. The

device can operate with a 3.3V core and 3.3V output, a

3.3V core and 2.5V outputs as well as a 2.5V core and

2.5V outputs. The 32-lead LQFP and TQFP Packages

were chosen to optimize performance, board space and

cost of the device. The 32-lead LQFP and TQFP Packages

have a 7x7mm

spacing.

* Pentium II is a trademark of Intel Corporation