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TMS320BC53PQA Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320BC53PQA Datasheet(HTML) 2 Page - Texas Instruments |
2 / 91 page TMS320C5x, TMS320LC5x DIGITAL SIGNAL PROCESSORS SPRS030A – APRIL 1995 – REVISED APRIL 1996 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 description (continued) Table 1 provides a comparison of the devices in the ’C5x generation. It shows the capacity of on-chip RAM and ROM memories, number of serial and parallel I/O ports, execution time of one machine cycle, and type of package with total pin count. Table 1. Characteristics of the ’C5x Processors ON-CHIP MEMORY (16-BIT WORDS) I/O PORTS POWER CYCLE TMS320 DARAM SARAM ROM I/O PORTS POWER SUPPLY CYCLE TIME PACKAGE TYPE DEVICES DATA DATA + PROG DATA + PROG PROG SERIAL PARALLEL† SUPPLY (V) TIME (ns) TYPE QFP‡ TMS320C50 544 512 9K 2K§ 2 64K 5 50/35/25 132 pin TMS320LC50 544 512 9K 2K§ 2 64K 3.3 50/40/25 132 pin TMS320C51 544 512 1K 8K§ 2 64K 5 50/35/25/20 100/132 pin TMS320LC51 544 512 1K 8K§ 2 64K 3.3 50/40/25 100/132 pin TMS320C52 544 512 – 4K§ 1¶ 64K 5 50/35/25/20 100 pin TMS320LC52 544 512 – 4K§ 1¶ 64K 3.3 50/40/25 100 pin TMS320C53 544 512 3K 16K§ 2 64K 5 50/35/25 132 pin TMS320LC53 544 512 3K 16K§ 2 64K 3.3 50/40/25 132 pin TMS320C53S 544 512 3K 16K§ 2 ¶ 64K 5 50/35/25 100 pin TMS320LC53S 544 512 3K 16K§ 2 ¶ 64K 3.3 50/40/25 100 pin TMS320LC56 544 512 6K 32K 2 # 64K 3.3 35/25 100 pin TMS320LC57 544 512 6K 32K 2 # 64K + HPI || 3.3 35/25 128 pin TMS320C57S 544 512 6K 2K§ 2 # 64K + HPI || 5 50/35/25 144 pin TMS320LC57S 544 512 6K 2K§ 2 # 64K + HPI || 3.3 50/35 144 pin † Sixteen of the 64K parallel I/O ports are memory mapped. ‡ QFP = Quad flatpack § ROM boot loader available ¶ TDM serial port not available # Includes auto-buffered serial port (BSP) but TDM serial port not available || HPI = Host port interface Pinouts for each package are device-specific. |
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