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TLV990 Datasheet(PDF) 5 Page - Texas Instruments |
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TLV990 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 22 page TLV990 3-V, 10-BIT, 28-MSPS AREA CCD AND VIDEO SIGNAL PROCESSOR SLVS298 – MAY 2000 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, TA = 25°C, AVDD=DVDD=3 V, ADCCLK=28 MHz (unless otherwise noted) total device PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AVDD operating current 43 mA DVDD operating current 7 mA Device power consumption 150 mW Power consumption in power-down mode 2 mW INL Full CCD channel integral nonlinearity AVDD=DVDD= 2.7 V – 3.3 V, ADCCLK=18 MSPS, 10 bits Using best fit method ±0.9 ±2 LSB DNL Full CCD channel differential nonlinearity AVDD=DVDD= 2.7 V – 3.3 V, ADCCLK=18 MSPS, 10 bits ±0.5 ±0.99 LSB INL Video channel integral nonlinearity AVDD=DVDD= 2.7 V – 3.3 V, ADCCLK=28 MSPS, 9 bits Using best fit method ±0.5 ±2 LSB DNL Video channel differential nonlinearity AVDD=DVDD= 2.7 V – 3.3 V, ADCCLK–28MSPS, 9 bits ±0.4 ±0.99 LSB No missing code Assured Full channel output latency 6 CLK cycles analog-to-digital converter (ADC) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ADC resolution in CCD mode ADCCLK=18MSPS 10 Bits Full scale input span 2 VP-P Conversion rate 28 MHz correlated double sample (CDS) and programmable gain amplifier (PGA) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CDS and PGA sample rate 28 MHz CDS full-scale input span Single-ended input 1 V Input capacitance of CDS 4 pF Minimum PGA gain 0 1 dB Maximum PGA gain 35 36 37 dB PGA gain resolution 0.045 dB PGA programming code resolution 10 Bits internal digital-to-analog converters (DAC) for offset correction PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DAC resolution 8 Bits INL Integral nonlinearity ±0.5 LSB DNL Differential nonlinearity ±0.5 LSB Output settling time To 1% accuracy 80 ns |
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