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TLV5638 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. TLV5638
Description  2.7 V TO 5.5 V LOW POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TLV5638 Datasheet(HTML) 4 Page - Texas Instruments

 
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TLV5638
2.7 V TO 5.5 V LOW POWER DUAL 12-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS225A – JUNE 1999 – REVISED JANUARY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions, Vref = 2.048 V, Vref = 1.024 V
(unless otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
TLV5638C,
TLV5638I
TLV5638Q,
TLV5638M
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
VDD = 5 V,
Fast
4.3
5.2
4.3
5.4
mA
DD
Int. ref.
Slow
2.2
2.7
2.2
2.7
mA
No load
VDD = 3 V,
Fast
3.8
4.7
3.8
4.9
mA
IDD
Power supply current
No load,
All inputs = AGND
DD
Int. ref.
Slow
1.8
2.3
1.8
2.3
mA
IDD
Power supply current
or VDD,
DAC latch
0x800
VDD = 5 V,
Fast
3.9
4.8
3.9
5.0
mA
DAC latch = 0x800
DD
Ext. ref.
Slow
1.8
2.2
1.8
2.2
mA
VDD = 3 V,
Fast
3.5
4.3
3.5
4.5
mA
DD
Ext. ref.
Slow
1.5
1.9
1.5
1.9
mA
Power-down supply current
0.01
10
0.01
10
µA
PSRR
Power supply rejection ratio
Zero scale, See Note 2
–65
–65
dB
PSRR
Power supply rejection ratio
Full scale,
See Note 3
–65
–65
dB
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) – EZS(VDDmin))/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) – EG(VDDmin))/VDDmax]
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
12
bits
INL
Integral nonlinearity end point adjusted
See Note 4
C and I suffixes
±1.7
±4
LSB
INL
Integral nonlinearity, end point adjusted
See Note 4
Q and M suffixes
±1.7
±6
LSB
DNL
Differential nonlinearity
See Note 5
±0.4
±1
LSB
EZS
Zero-scale error (offset error at zero scale)
See Note 6
±24
mV
EZS TC
Zero-scale-error temperature coefficient
See Note 7
10
ppm/
°C
EG
Gain error
See Note 8
±0.6
% full
scale V
EG TC
Gain error temperature coefficient
See Note 9
10
ppm/
°C
NOTES:
4. The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors. Tested from code 32 to 4095.
5. The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal 1
LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code.
6. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.
7. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) – EZS (Tmin)]/Vref × 106/(Tmax – Tmin).
8. Gain error is the deviation from the ideal output (2Vref – 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-error.
9. Gain temperature coefficient is given by: EG TC = [EG(Tmax) – EG (Tmin)]/Vref × 106/(Tmax – Tmin).


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