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TLC5733AIPM Datasheet(PDF) 8 Page - Texas Instruments |
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TLC5733AIPM Datasheet(HTML) 8 Page - Texas Instruments |
8 / 24 page TLC5733A 20 MSPS 3-CHANNEL ANALOG-TO-DIGITAL CONVERTER WITH HIGH-PRECISION CLAMP SLAS104A – JULY 1995 – REVISED NOVEMBER 1996 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 detailed description clamp function The clamp function is optimized for a YUV video signal and has two clamp modes. The first mode uses the COMPOSITE SYNC signal as the input to the EXTCLP terminal to generate an internal clamp pulse and the second mode uses an externally generated clamp pulse as the input to the EXTCLP terminal. In the first mode, the device detects false pulses in the COMPOSITE SYNC signal by monitoring the rising and falling edges of the COMPOSITE SYNC signal pulses. This monitoring prevents faulty operation caused by disturbances and missing pulses of the COMPOSITE SYNC signal input on EXTCLP and external spike noise. When fault pulses are detected, the device internally generates a train of clamp pulses at the proper positions (1H) by an internal 910-counter for NTSC and a 1136-counter for PAL. The device checks clamp pulses for 1H time and generates clamp pulses at correct positions when COMPOSITE SYNC pulses are in error in time. The internal counter continually produces a horizontal sync period (1H) that is NTSC or PAL compatible as selected by the condition of the NT/PAL terminal. clamp voltages and selection Table 1 shows the clamping level during the clamp interval. Table 2 shows the selection of the internal or external clamp pulse. With either NTSC or PAL, the internal clamp pulse is always used. Table 1. Clamp Level (Internal Connection Level) CHANNEL OF ADC OUTPUT CODE APPLICATION CHANNEL OF ADC OUTPUT CODE APPLICATION ADC A • VI(A) 00010000 Y ADC B • VI(B) 10000000 (U, V) ADC C • VI(C) 10000000 (U, V) Table 2. Clamp Level (Internal Connection Level) CONDITION FUNCTION (EACH ADC) CLPEN EXTCLP NT/PAL INTERNAL CLAMP CLAMP PULSE L Don’t Care Inactive External clamp pulse L L Don’t Care Inactive No clamping H COMPOSITE SYNC input L Active Synchronous with NTSC H COMPOSITE SYNC input H Active Synchronous with PAL The clamp circuit is shown in Figure 6. The clamp voltage is stored on capacitor C2 during the back porch of the horizontal blanking period. During the clamp pulse the input to channel A is clamped to: VC(A) = (16/256) × (voltage difference from terminal RT A to RB A) VC(B) = (128/256) × (voltage difference from terminal RT B to RB B) VC(C) = (128/256) × (voltage difference from terminal RT C to RB C) COMPOSITE SYNC time monitoring When CLPEN is high, COMPOSITE SYNC generates an internal clamp pulse on the horizontal blanking interval back porch. The TLC5733A has a timing window into which the horizontal sync tip must occur. There is a noise time window for the falling edge and one for the rising edge (see Figure 1, Figure 2, and Table 3). |
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