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TRPAFESM Datasheet(PDF) 4 Page - OPLINK Communications Inc.

Part No. TRPAFESM
Description  Fast Ethernet SFP Single Mode Transceivers with Digital Diagnostics
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Maker  OPLINK [OPLINK Communications Inc.]
Homepage  http://www.oplink.com
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TRPAFESM Datasheet(HTML) 4 Page - OPLINK Communications Inc.

   
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Oplink Communications, Inc.
RevB.-NP 2009.03.01
Example of SFP host board schematic
TRPAFESM
Application Notes
18
19
3
15
0.1
16
0.1
+ 10
1, 9, 10, 11, 14, 17, 20
0.1
+ 10
13
12
5
4
6
8
R
2
R
R
R
100
(100Ω to Ground Internally)
Vcc
3.3V
Vcc
3.3V
TX Disable
TX DATA IN+
TX DATA IN-
1μH coil or ferrite bead
(<0.2Ω series resistance)
TX Fault
LOS
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
RX DATA OUT+
to 50Ω load
RX DATA OUT-
to 50Ω load
Electrical Interface: All signal interfaces are compliant with
the SFP MSA specification. The high speed DATA interface
is differential AC-coupled internally with 0.1μF and can be
directly connected to a 3.3V SERDES IC. All low speed control
and sense output signals are open collector TTL compatible
and should be pulled up with a 4.7 - 10kΩ resistor on the host
board.
Loss of Signal (LOS): The Loss of Signal circuit monitors the
level of the incoming optical signal and generates a logic HIGH
when an insufficient photocurrent is produced.
TX Fault: The output indicates LOW when the transmitter
is operating normally, and HIGH with a laser fault including
laser end-of-life. TX Fault is an open collector/drain output
and should be pulled up with a 4.7 - 10kΩ resistor on the host
board. TX Fault is non-latching (automatically deasserts when
fault goes away).
TX Disable: When the TX Disable pin is at logic HIGH, the
transmitter optical output is disabled (less than -45dBm).
Serial Identification and Monitoring:The module definition
of SFP is indicated by the three module definition pins, MOD_
DEF(0), MOD_DEF(1) and MOD_DEF(2). Upon power up, MOD_
DEF(1:2) appear as NC (no connection), and MOD_DEF(0) isTTL
LOW.When the host system detects this condition, it activates
the serial protocol (standard two-wire I2C serial interface)
and generates the serial clock signal (SCL). The positive edge
clocks data into the EEPROM segments of the SFP that are not
write protected, and the negative edge clocks data from the
SFP. The serial data signal (SDA) is for serial data transfer. The
host uses SDA in conjunction with SCL to mark the start and
end of serial protocol activation. The supported monitoring
functions are temperature, voltage, bias current, transmitter
power, average receiver signal, all alarms and warnings, and
software monitoring of TX Fault/LOS. The device is internally
calibrated.
The data transfer protocol and the details of the mandatory
and vendor specific data structures are defined in the SFP MSA
and SFF-8472, Rev. 9.4.
Power Supply and Grounding:The power supply line should
be well-filtered. All 0.1μF power supply bypass capacitors
should be as close to the transceiver module as possible.
4
TRPAFESM
R: 4.7 to 10kΩ


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