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TCM37C14A Datasheet(PDF) 9 Page - Texas Instruments

Part No. TCM37C14A
Description  PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TCM37C14A Datasheet(HTML) 9 Page - Texas Instruments

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TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
transmit timing (see Figure 3)
MIN
MAX
UNIT
td(FSX)
Delay time (frame sync), FSX high or low before MCLK
100
tc(MCLK) –100
ns
receive timing (see Figure 4)
MIN
MAX
UNIT
td(FSR)
Delay time (frame sync), FSR high or low before MCLK
100
tc(MCLK) –100
ns
tsu(PCMIN)
Setup time, PCMIN high before MCLK
50
ns
th(PCMIN)
Hold time after PCMIN
60
ns
switching characteristics over recommended ranges of operating conditions
(see Figures 3 and 4)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
tpd1
Propagation delay time, MCLK
↑ to bit 1 data valid at PCMOUT (data enable time
on time slot entry) (see Note 8)
CL = 0 pF to 100 pF
0
145
ns
tpd2
Propagation delay time, MCLK
↑ bit n to bit n data valid at PCMOUT (data valid
time)
CL = 0 pF to 100 pF
0
145
ns
tpd3
Propagation delay time, MCLK
↓ low bit 8 to bit 8 Hi-Z at PCMOUT (data float
time on time slot exit) (see Note 8)
CL = 0 pF
60
215
ns
tpd4
Propagation delay time, MCLK
↑ bit 1 to TSX active (low) (time slot enable time)
CL = 0 pF to 100 pF
0
145
ns
tpd5
Propagation delay time, MCLK
↓ to bit 8 to TSX inactive (high) (timeslot disable
time) (see Note 8)
CL = 0 pF
60
190
ns
NOTE 8: Timing parameters tpd1, tpd3, and tpd5 are referenced to the high-impedance state.


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