SN75LVDS88A

TFT LCD PANEL TIMING CONTROLLER

WITH LVDS INTERFACE

SLLS398 – DECEMBER 1999

1

POST OFFICE BOX 655303

Differential Signalling(LVDS)

Module

2 kV HBM for Others

description

The SN75LVDS88A (LVDS panel timing controller) integrates a Flatlink signal interface with a TFT LCD timing

controller. It resides in the LCD panel and provides interface between the graphic controller and a TFT LCD

panel.

The SN75LVDS88A accepts host data through 3 pairs of inputs (18-bits) making up the LVDS bus, which is a

low-EMI high-throughput interface. SN75LVDS88A then reformats the received image data into a specific data

format and synchronous timing suitable for driving LCD panel column and row drivers. This device supports

XGA resolution.

The SN75LVDS88A is easily configured by several selection terminals and is equipped with default timing

specifications to support mainstream gate and source drivers on the market.

block diagram

Flat Link

(18-bit)

Timing

Signal

Generator

SYNC

Data Alignment

CTRL

Interface

Source

Data

Format

Copyright

© 1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.