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SN75LPE185DW Datasheet(PDF) 10 Page - Texas Instruments |
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SN75LPE185DW Datasheet(HTML) 10 Page - Texas Instruments |
10 / 13 page SN75LPE185 LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS WITH ENABLE SLLS256D – DECEMBER 1996 – REVISED OCTOBER 1998 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VOH VOL From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 4 V Open GND 5k Ω VI VO Waveform 1 (see Note B) VO Waveform 2 (see Note B) tPZL tPZH tPLZ tPHZ 50% 50% 0 V 50% VOL + 0.3 V 50% VOH – 0.3 V 0 V 3 V 4 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES tPHL/tPLH tPLZ/tPZL tPHZ/tPZH Open 4 V GND TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, tr = tf < 50 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 7. Receiver 3-State Parameter Test Circuit and Voltage Waveforms |
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