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SN74ALVCH16374 Datasheet(PDF) 1 Page - Texas Instruments

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Part No. SN74ALVCH16374
Description  16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74ALVCH16374 Datasheet(HTML) 1 Page - Texas Instruments

 
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FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
SN74ALVCH16374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES021L – JULY 1995 – REVISED SEPTEMBER 2004
Member of the Texas Instruments Widebus™
Family
Operates From 1.65 to 3.6 V
Max tpd of 4.2 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
This 16-bit edge-triggered D-type flip-flop is designed
for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16374 is particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers. It can be used as
two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (CLK) input, the
Q outputs of the flip-flop take on the logic levels at
the data (D) inputs. OE can be used to place the
eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In the
high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance
state and the increased drive provide the capability to
drive bus lines without need for interface or pullup
components.
the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1995–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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