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SN65LBC172 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. SN65LBC172
Description  QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65LBC172 Datasheet(HTML) 4 Page - Texas Instruments

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SN65LBC172, SN75LBC172
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER
SLLS163B – JULY 1993 – REVISED JANUARY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
UNIT
VIK
Input clamp voltage
II = – 18 mA
– 1.5
V
RL = 54 Ω,
SN65LBC172
1.1
1.8
5
|VOD|
Differential output voltage‡
L
,
See Figure 1
SN75LBC172
1.5
1.8
5
V
|VOD|
Differential output voltage‡
RL = 60 Ω,
SN65LBC172
1.1
1.7
5
V
L
,
See Figure 2
SN75LBC172
1.5
1.7
5
∆|VOD| Change in magnitude of common-mode output voltage§
±0.2
V
VOC
Common mode output voltage
RL =54 Ω
See Figure 1
3
V
VOC
Common-mode output voltage
RL = 54 Ω,
See Figure 1
–1
V
∆|VOC| Change in magnitude of common-mode output voltage§
±0.2
V
IO
Output current with power off
VCC = 0,
VO = – 7 V to 12 V
±100
µA
IOZ
High-impedance-state output current
VO = – 7 V to 12 V
±100
µA
IIH
High-level input current
VI = 2.4 V
– 100
µA
IIL
Low-level input current
VI = 0.4 V
– 100
µA
IOS
Short-circuit output current
VO = – 7 V to 12 V
±250
mA
ICC
Supply current (all drivers)
No load
Outputs enabled
7
mA
ICC
Supply current (all drivers)
No load
Outputs disabled
1.5
mA
† All typical values are at VCC = 5 V and TA = 25°C.
‡ The minimum VOD specification does not fully comply with EIA-485 at operating temperatures below 0°C. The lower output signal should be used
to determine the maximum signal-transmission distance.
§
∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input changes from a high level to a low
level.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(OD)
Differential output delay time
RL =54 Ω
See Figure 3
2
11
20
ns
tt(OD)
Differential output transition time
RL = 54 Ω,
See Figure 3
10
15
25
ns
tPZH
Output enable time to high level
RL = 110 Ω,
See Figure 4
30
ns
tPZL
Output enable time to low level
RL = 110 Ω,
See Figure 5
30
ns
tPHZ
Output disable time from high level
RL = 110 Ω,
See Figure 4
50
ns
tPLZ
Output disable time from low level
RL = 110 Ω,
See Figure 5
30
ns


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