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SNJ55LVDS32W Datasheet(PDF) 6 Page - Texas Instruments |
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SNJ55LVDS32W Datasheet(HTML) 6 Page - Texas Instruments |
6 / 37 page SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637 HIGHSPEED DIFFERENTIAL LINE RECEIVERS SLLS262N − JULY 1997 − REVISED MARCH 2004 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55LVDS32 electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VITH+ Positive-going differential input voltage threshold See Figure 2, Table 1, and Note 2 100 mV VITH− Negative-going differential input voltage threshold‡ See Figure 2, Table 1, and Note 2 −100 mV VOH High-level output voltage IOH = −8 mA 2.4 V VOL Low-level output voltage IOL = 8 mA 0.4 V ICC Supply current Enabled, No load 10 18 mA ICC Supply current Disabled 0.25 0.5 mA II Input current (A or B inputs) VI = 0 −2 −10 −20 A II Input current (A or B inputs) VI = 2.4 V −1.2 −3 µA II(OFF) Power-off input current (A or B inputs) VCC = 0, VI = 2.4 V 6 20 µA IIH High-level input current (EN, G, or G inputs) VIH = 2 V 10 µA IIL Low-level input current (EN, G, or G inputs) VIL = 0.8 V 10 µA IOZ High-impedance output current VO = 0 or VCC ±12 µA † All typical values are at TA = 25°C and with VCC = 3.3 V. ‡ The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for the negative-going differential input voltage threshold only. NOTE 2: |VITH| = 200 mV for operation at −55°C SN55LVDS32 switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output 1.3 2.3 6 ns tPHL Propagation delay time, high-to-low-level output 1.4 2.2 6.1 ns tsk(o) Channel-to-channel output skew§ CL = 10 pF, See Figure 3 0.1 ns tr Output signal rise time, 20% to 80% CL = 10 pF, See Figure 3 0.6 ns tf Output signal fall time, 80% to 20% 0.7 ns tPHZ Propagation delay time, high-level-to-high-impedance output 6.5 12 ns tPLZ Propagation delay time, low-level-to-high-impedance output See Figure 4 5.5 12 ns tPZH Propagation delay time, high-impedance-to-high-level output See Figure 4 8 14 ns tPZL Propagation delay time, high-impedance-to-low-level output 3 12 ns § tsk(o) is the maximum delay time difference between drivers on the same device. |
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