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SN55ALS160 Datasheet(PDF) 8 Page - Texas Instruments |
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SN55ALS160 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 12 page SN55ALS160, SN75ALS160 OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS SLLS018D – JUNE 1986 – REVISED MAY 1995 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 3 V 0 VOH VOL tPHL tPLH 1.5 V D Output B Input D TE B Output 4.3 V [7 V] 50 Ω Generator (see Note A) TEST CIRCUIT VOLTAGE WAVEFORMS 240 Ω [500 Ω] 3 k Ω [500 Ω] CL = 30 pF [ = 50 pF ] (see Note B) 1.5 V 1.5 V 1.5 V [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 2. Bus-to-Terminal Test Circuit and Voltage Waveforms TEST CIRCUIT VOLTAGE WAVEFORMS 0.5 V 1 V 90% 0 0.8 V 3.5 V VOL VOH 3 V 2 V 1.5 V 1.5 V B Output S1 to GND S2 Closed B Output S1 to 3 V S2 Open TE Input S2 5 V [7 V] Output S1 3 V PE B D 50 Ω TE Generator (see Note A) tPLZ tPHZ tPZL tPZH CL = 15 pF [ = 50 pF ] (see Note B) 200 Ω [500 Ω] 480 Ω [500 Ω] [ ] denotes the SN55ALS160 military test conditions. NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes probe and jig capacitance. Figure 3. TE-to-Bus Test Circuit and Voltage Waveforms |
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