CAT9552WI datasheet(11/17 Pages) ONSEMI

Part #	CAT9552WI

Description	16-Channel I2C-bus LED Driver with Programmable Blink Rate

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CAT9552

11

Doc. No. MD-9005 Rev B

Characteristics subject to change without notice

External Reset Operation

The CAT9552 registers and the I

2C state machine are

initialized to their default state when the RESET input

is held low for a minimum of tW. CAT9552’s registers

will be held in their default state until RESET returns

to a logic HIGH state. The external Reset timing is

shown in Figure 9.

Power-On Reset Operation

The CAT9552 incorporates Power-On Reset (POR)

circuitry which protects the internal logic against

powering up in the wrong state. The device is in a

reset state for VCC less than the internal POR

threshold level (VPOR). When VCC exceeds the VPOR

level, the reset state is released and the CAT9552

internal state machine and registers are initialized to

their default state. Thereafter VCC must be taken

below 0.2V to reset the device.

11

0

A2

A1

A0

READ FROM

PORT

DATA INTO

PORT

SDA

SA

A

DATA 1

DATA 4

Slave Address

Data From Port

Start Condition

R/W

Acknowledge

From Slave

Acknowledge

From Master

Stop

Condition

tps

DATA 4

DATA 2

P

DATA 3

tph

NA

DATA 1

No Acknowledge

From Master

Figure 8. Read Input Port Register Timing Diagram

Figure 9. RESET

¯¯¯¯¯¯ Timing Diagram

SDA

SCL

tRESET

50%

30%

50%

tREC

tW

RESET

LEDx

LED OFF

ACK OR READ CYCLE

START

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CAT9552WI Datasheet(PDF) 11 Page - ON Semiconductor

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