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CAT4008Y-GT2 Datasheet(PDF) 4 Page - ON Semiconductor |
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CAT4008Y-GT2 Datasheet(HTML) 4 Page - ON Semiconductor |
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4 / 14 page  CAT4008 Doc. No. MD-5034 Rev. C 4 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice TIMING CHARACTERISTICS For 3.0V ≤ V DD ≤ 5.5V, TAMB = 25 ºC, unless specified otherwise. Symbol Name Conditions Min 1F (1) Typ 2F (2) Max 3F (1) Units CLK fclk CLK Clock Frequency 25 MHz tcwh CLK Pulse Width High 20 ns tcwl CLK Pulse Width Low 20 ns SIN tssu Setup time SIN to CLK 4 ns tsh Hold time SIN to CLK 4 ns LATCH tlwh LATCH Pulse width 20 ns Tlh Hold time LATCH to CLK 4 ns Tlsu Setup time LATCH to CLK Channel Stagger Delay 400 ns LEDn tld LED1 Propagation delay LATCH to LED1 off/on 40 300 ns tls LED Propagation delay stagger LED(n) to LED(n+1) 17 40 ns tlst LED Propagation delay stagger total LED1 to LED8 120 ns tbd BLANK Propagation delay BLANK to LED(n) off/on 60 300 ns tlr LED rise time (10% to 90%) Pull-up resistor = 50 Ω to 3.0V 40 200 ns tlf LED fall time (90% to 10%) Pull-up resistor = 50 Ω to 3.0V 30 250 ns SOUT tor SOUT rise time (10% to 90%) CL = 15pF 5 ns tof SOUT fall time (90% to 10%) CL = 15pF 5 ns tod Propagation delay time SOUT CLK to SOUT 8 15 25 ns TEST CIRCUIT FOR AC CHARACTERISTICS Notes: (1) All min and max values are guaranteed by design. (2) VDD = 5V, LED current 30mA. LED1 VDD VDD 1µF BLANK LATCH SIN CLK GND CAT4008 LED8 SOUT RSET RSET 15pF Cl V1 3V Rp 50 Ω Rp 50 Ω |
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Similar Description - CAT4008Y-GT2 |
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