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SN74LVTH16240DGG Datasheet(PDF) 3 Page - Texas Instruments |
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SN74LVTH16240DGG Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 11 page  SN54LVTH16240, SN74LVTH16240 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS684C – MARCH 1997 – REVISED APRIL 1999 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 1 47 46 44 43 2 3 5 6 2OE 2A1 2A2 2A3 2A4 2Y1 2Y2 2Y3 2Y4 48 41 40 38 37 8 9 11 12 3OE 3A1 3A2 3A3 3A4 3Y1 3Y2 3Y3 3Y4 25 36 35 33 32 13 14 16 17 4OE 4A1 4A2 4A3 4A4 4Y1 4Y2 4Y3 4Y4 24 30 29 27 26 19 20 22 23 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC –0.5 V to 4.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (see Note 1) –0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) –0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range applied to any output in the high state, VO (see Note 1) –0.5 V to VCC + 0.5 V . . . . . . . . . . . . . Current into any output in the low state, IO: SN54LVTH16240 96 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SN74LVTH16240 128 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current into any output in the high state, IO (see Note 2): SN54LVTH16240 48 mA . . . . . . . . . . . . . . . . . . . . . SN74LVTH16240 64 mA . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK (VI < 0) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < 0) –50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 3): DGG package 89 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DL package 94 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and VO > VCC. 3. The package thermal impedance is calculated in accordance with JESD 51. |
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