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SN74LVC540APW Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC540APW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 9 page SN54LVC540A, SN74LVC540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS297H – JANUARY 1993 – REVISED JUNE 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C D Power Off Disables Outputs, Permitting Live Insertion D Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Latch-Up Performance Exceeds 250 mA Per JESD 17 D Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and DIPs (J) description The SN54LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC540A octal buffer/driver is designed for 1.65-V to 3.6-V VCC operation. These devices are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54LVC540A is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74LVC540A is characterized for operation from –40 °C to 85°C. Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 SN54LVC540A ...J OR W PACKAGE SN74LVC540A . . . DB, DW, OR PW PACKAGE (TOP VIEW) 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 Y1 Y2 Y3 Y4 Y5 A3 A4 A5 A6 A7 SN54LVC540A . . . FK PACKAGE (TOP VIEW) On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. |
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