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SN74ACT74DB Datasheet(PDF) 1 Page - Texas Instruments |
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SN74ACT74DB Datasheet(HTML) 1 Page - Texas Instruments |
1 / 6 page SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520E – AUGUST 1995 – REVISED JANUARY 2000 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Inputs Are TTL-Voltage Compatible D EPIC ™ (Enhanced-Performance Implanted CMOS) 1- µm Process D Package Options Include Plastic Small-Outline (DW) Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPs description The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs. The SN54ACT74 is characterized for operation over the full military temperature range of –55 °C to 125 °C. The SN74ACT74 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H LX XL H L LX X H† H† H H ↑ HH L H H ↑ LL H H H L X Q0 Q0 † This configuration is unstable; that is, it does not persist when either PRE or CLR returns to its inactive (high) level. Copyright © 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1CLR 1D 1CLK 1PRE 1Q 1Q GND VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2D NC 2CLK NC 2PRE 1CLK NC 1PRE NC 1Q SN54ACT74 . . . FK PACKAGE (TOP VIEW) SN54ACT74 ...J OR W PACKAGE SN74ACT74 . . . D, DB, N, OR PW PACKAGE (TOP VIEW) NC – No internal connection On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. |
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