FEATURES

n

14-bit resolution

n

5MPPS throughput rate (14-bits)

n

Extended temperature range -55°C to +100°C

n

1 LSB RMS Noise

n

Excellent Signal-to-Noise ratio

n

Edge triggered

n

Small, 40-pin, TDIP package

n

Low power, 700mW typical

n

Low cost, functionally complete

n

Programmable Analog Bandwidth

4

3

2

26

INVERTING INPUT

DIRECT INPUT

OFFSET ADJUST

REFERENCE HOLD

27

32, 33

7, 35, 37

DATA VALID

DIGITAL GROUND

ANALOG GROUND

25

23

10

24

6

START CONVERT

BIT 1 (MSB)

BIT 14 (LSB)

OUT-OF-RANGE

+2.4V REFERENCE OUTPUT

39

38

36

34

TIMING

AND

CONTROL

SAMPLING

A/D

NON-INVERTING INPUT

75

�

523

�

0.01µF

5K

�

1

FINE GAIN ADJUST

5

INPUT AMPLIFIER

30 31

A1

CORRELATED

DOUBLE

SAMPLER

AØ

Figure 1. ADCDS-1405 Functional Block Diagram

INPUT/OUTPUT CONNECTIONS

Pin

Function

Pin

Function

1

Fine Gain Adjust

40

No Connect

2

Offset Adjust

39

+12v

3

Direct Input

38

–5va

4

Inverting Input

37

Analog Ground

5

Non-Inverting Input

36

+5va

6

+2.4v Ref. Output

35

Analog Ground

7

Analog Ground

34

+5vd

8

No Connect

33

Digital Ground

9

No Connect

32

Digital Ground

10

Bit 14 (Lsb)

31

A1

11

Bit 13

30

12

Bit 12

29

No Connect

13

Bit 11

28

No Connect

14

Bit 10

27

Data Valid

15

Bit 9

26

Reference Hold

16

Bit 8

25

Start Convert

17

Bit 7

24

Out-Of-Range

18

Bit 6

23

Bit 1 (Msb)

19

Bit 5

22

Bit 2

20

Bit 4

21

Bit 3

The ADCDS-1405 is an application-specific video signal processor designed for

electronic-imaging applications that employ CCD's (charge coupled devices) as their

photodetector. The ADCDS-1405 incorporates a "user configurable" input amplifier, a CDS

(correlated double sampler) and a sampling A/D converter in a single package, providing

the user with a complete, high performance, low-cost, low-power, integrated solution.

The key to the ADCDS-1405's performance is a unique, high-speed, high-accuracy

CDS circuit, which eliminates the effects of residual charge, charge injection and "kT/C"

noise on the CCD's output floating capacitor, producing a "valid video" output signal. The

ADCDS-1405 digitizes this resultant "valid video" signal using a high-speed, low-noise

sampling A/D converter.

The ADCDS-1405 requires only the rising edge of start convert pulse to initiate its con-

version process. Additional features of the ADCDS-1405 include gain adjust, offset adjust,

precision +2.4V reference, and a programmable analog bandwidth function.

PRODUCT OVERVIEW

Typical unit

ADCDS-1405

14-Bit, 5 Megapixels/Second, CCD Signal Processor

For full details go to

www.murata-ps.com/rohs

www.murata-ps.com

SIMPLIFIED SCHEMATIC

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