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SN54ABT16853 Datasheet(PDF) 3 Page - Texas Instruments |
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SN54ABT16853 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 8 page SN54ABT16853, SN74ABT16853 DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS SCBS153B – OCTOBER 1992 – REVISED JANUARY 1997 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (each transceiver) (positive logic) PARITY ERR CLR B1–B8 A1–A8 LE OEA OEB EN EN 8x 8x MUX 1 1 G1 1 1 2k P 8 9 8 8 8 8 ERROR-FLAG FUNCTION TABLE INPUTS INTERNAL TO DEVICE OUTPUT OUTPUT ERR FUNCTION CLR LE POINT P ERRn–1† ERR L L L X L Pass L L H X H Pass L X L H L X LL Sample H HH L H X X H Clear H H X L L Store H H X H H Store † State of ERR before changes at CLR, LE, or point P |
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