SQ33D Series 1.8 V

CMOS Clock Oscillators

January 2006

www.pletronics.com

425-776-1880

6

Mechanical:

Inches

mm

Cover:

Kovar

Electroless Nickel Plated

1 μinch (25 μm) typical

Resistance welded to base

Label:

White Kapton with Black Letters

–or--

Blue Epoxy heat cure ink with laser

marked lettering

Base:

Kovar

Glass to metal sealed leads

Pin 4 Connected to case

Not to scale

A

0.487 +

_0.005

12.37 +

_0.13

B

0.487 +

_0.005

12.37 +

_0.13

C

0.225 +

_0.011

5.72 +

_0.28

0.250

6.35

0.020

0.51

0.031

0.79

0.094

2.37

0.300

7.62

0.200

7.62

0.094

2.37

Pad

Function

Note

1

Output

Enable/Disable

When this pad is not connected the oscillator shall operate.

When this pad is logic low the output will be inhibited (high impedance state.)

Recommend connecting this pad to V

4

Ground (GND)

5

Output

8

Supply Voltage

(V

Recommend connecting appropriate power supply bypass capacitors as close as

possible.

Layout and application information

For Optimum Jitter Performance, Pletronics recommends:

•

a ground plane under the device

•

no large transient signals (both current and voltage) should be routed under the device

•

do not layout near a large magnetic field such as a high frequency switching power supply

•

do not place near piezoelectric buzzers or mechanical fans.