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EPF10K50V Datasheet(PDF) 42 Page - Altera Corporation |
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EPF10K50V Datasheet(HTML) 42 Page - Altera Corporation |
42 / 128 page 42 Altera Corporation FLEX 10K Embedded Programmable Logic Device Family Data Sheet Notes: (1) The most significant bit (MSB) is on the left. (2) The least significant bit (LSB) for all JTAG IDCODEs is 1. FLEX 10K devices include weak pull-ups on JTAG pins. f For more information, see the following documents: ■ Application Note 39 (IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices) ■ BitBlaster Serial Download Cable Data Sheet ■ ByteBlasterMV Parallel Port Download Cable Data Sheet ■ Jam Programming & Test Language Specification Table 15. 32-Bit FLEX 10K Device IDCODE Note (1) Device IDCODE (32 Bits) Version (4 Bits) Part Number (16 Bits) Manufacturer’s Identity (11 Bits) 1 (1 Bit) (2) EPF10K10, EPF10K10A 0000 0001 0000 0001 0000 00001101110 1 EPF10K20 0000 0001 0000 0010 0000 00001101110 1 EPF10K30, EPF10K30A 0000 0001 0000 0011 0000 00001101110 1 EPF10K40 0000 0001 0000 0100 0000 00001101110 1 EPF10K50, EPF10K50V 0000 0001 0000 0101 0000 00001101110 1 EPF10K70 0000 0001 0000 0111 0000 00001101110 1 EPF10K100, EPF10K100A 0000 0000 0001 0000 0000 00001101110 1 EPF10K130V 0000 0000 0001 0011 0000 00001101110 1 EPF10K250A 0000 0000 0010 0101 0000 00001101110 1 |
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