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SMJ320C31 Datasheet(PDF) 42 Page - Texas Instruments |
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SMJ320C31 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 57 page  SMJ320C31, SMJ320LC31, SMQ320LC31 DIGITAL SIGNAL PROCESSORS SGUS026B– APRIL 1998 – REVISED APRIL 1999 42 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing for peripheral pin changing from general-purpose input to output mode (see Note 6 and Figure 31) NO. ’C31-40 ’LC31-40 ’C31-50 UNIT MIN MAX MIN MAX 87 td(H1H-GPIO) Delay time, H1 high to peripheral pin switching from input to output 13 10 ns NOTE 6: Peripheral pins include CLKX0, CLKR0, DX0, DR0, FSX0, FSR0, and TCLK0 / 1. The modes of these pins are defined by the contents of internal-control registers associated with each peripheral. Peripheral Pin (see Note A) I/O Control Bit H1 H3 Execution of Store of Peripheral- Control Register 87 NOTE A: Peripheral pins include CLKX0, CLKR0, DX0, DR0, FSX0, FSR0, and TCLK0/1. Figure 31. Timing for Change of Peripheral Pin From General-Purpose Input to Output Mode |
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