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PCI1451 Datasheet(PDF) 10 Page - Texas Instruments |
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PCI1451 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 141 page viii List of Tables Table Title Page 2–1 GJG Terminals Sorted Alphanumerically for CardBus // 16-Bit Signals 2–2 . 2–2 CardBus PC Card Signal Names Sorted Alphanumerically to GJG Terminal Number 2–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 16-Bit PC Card Signal Names Sorted Alphanumerically to GJG Terminal Number 2–6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4 Power Supply 2–8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5 PC Card Power Switch 2–8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6 PCI System 2–8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7 PCI Address and Data 2–9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–8 PCI Interface Control 2–10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–9 System Interrupt 2–11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–10 PC/PCI DMA 2–11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–11 Zoomed Video 2–12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–12 Miscellaneous 2–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–13 16-Bit PC Card Address and Data (slots A and B) 2–14 . . . . . . . . . . . . . . . . . . . 2–14 16-Bit PC Card Interface Control (slots A and B) 2–15 . . . . . . . . . . . . . . . . . . . . 2–15 CardBus PC Card Interface System (slots A and B) 2–16 . . . . . . . . . . . . . . . . . 2–16 CardBus PC Card Address and Data (slots A and B) 2–17 . . . . . . . . . . . . . . . . 2–17 CardBus PC Card Interface Control (slots A and B) 2–18 . . . . . . . . . . . . . . . . . 3–1 Registers and Bits Loadable Through Serial EEPROM 3–5 . . . . . . . . . . . . . . . . . . . 3–2 PC Card – Card Detect and Voltage Sense Connections 3–7 . . . . . . . . . . . . . 3–3 Distributed DMA Registers 3–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4 CardBus Socket Registers 3–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5 PC Card Interrupt Events and Description 3–15 . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6 PCI1451 Interrupt Masks and Flags Registers 3–16 . . . . . . . . . . . . . . . . . . . . . . 3–7 Interrupt Pin Register Cross Reference 3–17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1 Functions 0 and 1 PCI Configuration Register Map 4–1 . . . . . . . . . . . . . . . . . . 4–2 PCI Command Register Description 4–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 Status Register Description 4–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–4 Secondary Status Register Description 4–8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5 Interrupt Pin Register Cross Reference 4–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–6 Bridge Control Register Description 4–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–7 System Control Register Description 4–17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–8 Multimedia Control Register Description 4–20 . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9 General Status Register Description 4–21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–10 General-Purpose Event Status Register Description 4–22 . . . . . . . . . . . . . . . . . 4–11 General-Purpose Event Enable Register Description 4–22 . . . . . . . . . . . . . . . . 4–12 General-Purpose Input Register Description 4–23 . . . . . . . . . . . . . . . . . . . . . . . . 4–13 General-Purpose Output Register Description 4–23 . . . . . . . . . . . . . . . . . . . . . . |
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